Diek O. Van Nort

Diek O. Van Nort

Of Counsel

San Francisco, (415) 268-6971


Vanderbilt University (B.S., 1999)
Vanderbilt University (M.S., 2002)
Santa Clara University School of Law (J.D., 2010)

Bar Admissions

U.S. Patent & Trademark Office

Diek Van Nort’s practice focuses on all aspects of patents. He applies his prior experience as a senior engineer in the semiconductor industry and as a director in the IP business field to advising clients on patent drafting, prosecution, portfolio management, strategy, diligence, post-grant, and infringement matters.

As a member of the Patent Group, Mr. Van Nort has drafted and prosecuted U.S. and foreign patent applications involving a variety of technology fields, including semiconductor devices and fabrication, integrated circuits, MEMS, computer networks, wireless communications, software, and medical devices. Mr. Van Nort also represents requesters and patent owners in post-grant review proceedings. He has extensive experience with reexaminations and inter partes reviews ranging from drafting petitions to oral arguments before the Patent Trials and Appeal Board. Mr. Van Nort also regularly works with the IP Litigation group when he has argued claim construction positions during oral hearings, drafted summary judgement motions, and worked extensively with experts.

Mr. Van Nort was with the firm from 2008 to 2012, first as a law clerk (2008-2010) and then an associate (2010-2012). Prior to rejoining the firm in 2014, Mr. Van Nort was Director of IP Asset Development at an IP business consulting firm. While there, he responded to technical and legal arguments in licensing negotiations, drafted claims charts, analyzed portfolios for acquisition, and managed outside counsel in matters before the USPTO.

Mr. Van Nort received his J.D. from Santa Clara University School of Law in May 2010. While in law school, he was awarded an IP Fellowship and was an associate on the Santa Clara Computer & High Technology Law Journal.

Prior to attending law school, he worked at a semiconductor foundry as a senior engineer engaged in a wide range of activities, including e-test, failure analysis, product test and support, process integration, new product manufacturing, and MEMS research and development. Mr. Van Nort received his B.S. in electrical engineering and computer science and his M.S. in electrical engineering from Vanderbilt University.

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